System Memory - The system memory is the place where the computer holds current programs and data that are in use. The term "memory" is somewhat ambiguous; it can refer to many different parts of the PC because there are so many different kinds of memory that a PC uses. However, when used by itself, "memory" usually refers to the main system memory, which holds the instructions that the processor executes and the data that those instructions work with. Your system memory is an important part of the main processing subsystem of the PC, tied in with the processor, cache, motherboard and chipset.
Memory plays a significant role in the following important aspects of your computer system:
Performance: The amount and type of system memory you have is an important contributing factor to overall performance. In many ways, it is more important than the processor, because insufficient memory can cause a processor to work at 50% or even more below its performance potential. This is an important point that is often overlooked.
Software Support: Newer programs require more memory than old ones. More memory will give you access to programs that you cannot use with a lesser amount.
Reliability and Stability: Bad memory is a leading cause of mysterious system problems. Ensuring you have high-quality memory will result in a PC that runs smoothly and exhibits fewer problems. Also, even high-quality memory will not work well if you use the wrong kind.
Upgradability: There are many different types of memory available, and some are more universal than others. Making a wise choice can allow you to migrate your memory it to a future system or continue to use it after you upgrade your motherboard.
Memory Technology Types - The system memory itself is made from DRAM, but the other types are explained here to show the other major technology types in use in the PC, and how they differ from DRAM.
ROM: Read-Only Memory. One major type of memory that is used in PCs is called read-only memory, or ROM for short. ROM is a type of memory that normally can only be read, as opposed to RAM which can be both read and written. There are two main reasons that read-only memory is used for certain functions within the PC: Permanence. The values stored in ROM are always there, whether the power is on or not. A ROM can be removed from the PC, stored for an indefinite period of time, and then replaced, and the data it contains will still be there. For this reason, it is called non-volatile storage. A hard disk is also non-volatile, for the same reason, but regular RAM is not.Security: The fact that ROM cannot easily be modified provides a measure of security against accidental (or malicious) changes to its contents. You are not going to find viruses infecting true ROMs, for example; it's just not possible. (It's technically possible with erasable EPROMs, though in practice never seen.)
Read-only memory is most commonly used to store system-level programs that we want to have available to the PC at all times. The most common example is the system BIOS program, which is stored in a ROM called (amazingly enough) the system BIOS ROM. Having this in a permanent ROM means it is available when the power is turned on so that the PC can use it to boot up the system. Remember that when you first turn on the PC the system memory is empty, so there has to be something for the PC to use when it starts up.
RAM: Random Access Memory. The kind of memory used for holding programs and data being executed is called random access memory or RAM. RAM differs from read-only memory (ROM) in that it can be both read and written. It is considered volatile storage because unlike ROM, the contents of RAM are lost when the power is turned off. RAM is also sometimes called read-write memory or RWM. It's a better name because calling RAM "random access" implies to some people that ROM isn't random access, which is not true. RAM is called "random access" because earlier read-write memories were sequential and did not allow random access. Sometimes old acronyms persist even when they don't make much sense any more. Obviously, RAM needs to be writable in order for it to do its job of holding programs and data that you are working on. The volatility of RAM also means that you risk losing what you are working on unless you save it frequently. RAM is much faster than ROM is, due to the nature of how it stores information. This is why RAM is often used to shadow the BIOS ROM to improve performance when executing BIOS code. There are many different types of RAMs, including static RAM (SRAM) and many flavors of dynamic RAM (DRAM).
SRAM: Static RAM. Static RAM is a type of RAM that holds its data without external refresh, for as long as power is supplied to the circuit. This is contrasted to dynamic RAM (DRAM), which must be refreshed many times per second in order to hold its data contents. SRAMs are used for specific applications within the PC, where their strengths outweigh their weaknesses compared to DRAM: Simplicity: SRAMs don't require external refresh circuitry or other work in order for them to keep their data intact. Speed: SRAM is faster than DRAM. In contrast, SRAMs have the following weaknesses, compared to DRAMs: Cost: SRAM is, byte for byte, several times more expensive than DRAM. Size: SRAMs take up much more space than DRAMs (which is part of why the cost is higher).
These advantages and disadvantages taken together obviously show that performance-wise, SRAM is superior to DRAM, and we would use it exclusively if only we could do so economically. Unfortunately, 32 MB of SRAM would be prohibitively large and costly, which is why DRAM is used for system memory. SRAMs are used instead for level 1 cache and level 2 cache memory, for which it is perfectly suited; cache memory needs to be very fast, and not very large.
DRAM: Dynamic RAM. Dynamic RAM is a type of RAM that only holds its data if it is continuously accessed by special logic called a refresh circuit. Many hundreds of times each second, this circuitry reads the contents of each memory cell, whether the memory cell is being used at that time by the computer or not. Due to the way in which the cells are constructed, the reading action itself refreshes the contents of the memory. If this is not done regularly, then the DRAM will lose its contents, even if it continues to have power supplied to it. This refreshing action is why the memory is called dynamic.
All PCs use DRAM for their main system memory, instead of SRAM, even though DRAMs are slower than SRAMs and require the overhead of the refresh circuitry. It may seem weird to want to make the computer's memory out of something that can only hold a value for a fraction of a second. In fact, DRAMs are both more complicated and slower than SRAMs.
The reason that DRAMs are used is simple: they are much cheaper and take up much less space, typically 1/4 the silicon area of SRAMs or less. To build a 64 MB core memory from SRAMs would be very expensive. The overhead of the refresh circuit is tolerated in order to allow the use of large amounts of inexpensive, compact memory. The refresh circuitry itself is almost never a problem; many years of using DRAM has caused the design of these circuits to be all but perfected.
DRAMs are smaller and less expensive than SRAMs because SRAMs are made from four to six transistors (or more) per bit, DRAMs use only one, plus a capacitor. The capacitor, when energized, holds an electrical charge if the bit contains a "1" or no charge if it contains a "0". The transistor is used to read the contents of the capacitor. The problem with capacitors is that they only hold a charge for a short period of time, and then it fades away. These capacitors are tiny, so their charges fade particularly quickly. This is why the refresh circuitry is needed: to read the contents of every cell and refresh them with a fresh "charge" before the contents fade away and are lost. Refreshing is done by reading every "row" in the memory chip one row at a time; the process of reading the contents of each capacitor re-establishes the charge. For an explanation of how these "rows" are read, and thus how refresh is accomplished, refer to this section describing memory access.
DRAM is manufactured using a similar process to how processors are: a silicon substrate is etched with the patterns that make the transistors and capacitors (and support structures) that comprise each bit. DRAM costs much less than a processor because it is a series of simple, repeated structures, so there isn't the complexity of making a single chip with several million individually-located transistors.
There are many different kinds of specific DRAM technologies and speeds that they are available in. These have evolved over many years of using DRAM for system memory, and are discussed in more detail in the following.
Memory Access and Access Time - When memory is read or written, this is called a memory access. A specific procedure is used to control each access to memory, which consists of having the memory controller generate the correct signals to specify which memory location needs to be accessed, and then having the data show up on the data bus to be read by the processor or whatever other device requested it.
In order to understand how memory is accessed, it is first necessary to have a basic understanding of how memory chips are addressed. Let's take as an example a common 16Mbit chip, configured as 4Mx4. This means that there are 4M (4,194,304) addresses with 4 bits each; so there are 4,194,304 different memory locations--sometimes called cells--each of which contains 4 bits of data.. 4,194,304 is equal to 2^22, which means 22 bits are required to uniquely address that number of memory locations. Thus, in theory 22 address lines are required.
However, in practice, memory chips do not have this many address lines. They are instead logically organized as a "square" of rows and columns. The low-order 11 bits are considered the "row" and the high-order 11 bits the "column". First the row address is sent to the chip, and then the column address. For example, let's suppose that we want to access memory location 2,871,405 in this chip. This corresponds to a binary address of "10101111010 00001101101". First, "00001101101" would be sent to select the "row", and then "10101111010" would be sent to select the column. This combination selects the unique location of memory address 2,871,405. This is analogous to how you might select a particular cell on a spreadsheet: go to row #34, say, and then look at column "J" to find cell "J34".
Intuitively, it would seem that designing memory chips in this manner is both more complex and slower than just putting one address pin on the chip for each address line required to uniquely address the chip--why not just put 22 address pins on the chip? It may not surprise you to learn that the answer is "cost". By using the row/column method, it is possible to greatly reduce the number of pins on the DRAM chip. Here, 11 address pins are required instead of 22 (though you lose a small part of the "savings" of 22-11=11 to additional control signals that are needed to manage the row/column timing.) You also save some of the buffers and other circuitry that are required for each address line. Certainly having to send the address in two "chunks" slows down the addressing process, but keeping the chip smaller and with fewer inputs allows it to use less power, which makes it possible to run the chip faster, partially offsetting the loss in access speed.
Of course, a PC doesn't have a single memory chip; most have dozens, depending on total memory capacity and the size of DRAMs being used. The chips are arranged into modules, and then into banks, and the memory controller manages which sets of chips are read from or written to. Since a modern PC reads or writes 64 bits at a time, each read or write involves simultaneous accesses to as many as 64 different DRAM chips.
Here is a simplified walkthrough of how a basic read memory access is performed. This is a conventional asynchronous read, because the timing signals are not tied to the main system clock; synchronous DRAM uses different timing signals:
The address for the memory location to be read is placed on the address bus.
The memory controller decodes the memory address and determines which chips are to be accessed.
The lower half of the address ("row") is sent to the chips to be read.
After allowing sufficient time for the row address signals to stabilize, the memory controller sets the row address strobe (sometimes called row address select) signal to zero. (This line is abbreviated as "RAS" with a horizontal line over it. The horizontal line is a short-hand code that tell engineers working with the circuit that the signal is "active low", meaning that the chip is looking for it to be set to zero as a signal to "do something". There's no way in HTML to reliably use this notation so instead, I will write "/RAS".)
When the /RAS signal has settled at zero, the entire row selected (all 2^11 columns in the example above, or 2048 different cells of 4 bits each) is read by the circuits in the chip. Note that this action refreshes all the cells in that row; refreshing is done one row at a time.
The higher half of the address ("column") is sent to the chips to be read.
After allowing sufficient time for the column address signals to stabilize, the memory controller sets the column address strobe (or column address select) signal to zero. This line is abbreviated as "CAS" with a horizontal line over it, or "/CAS".
When the /CAS signal has settled at zero, the selected column is fed to the output buffers of the chip.
The output buffers of all the accessed memory chips feed the data out onto the data bus, where the processor or other device that requested the data can read it.
Note that this is a very simplified example, since it doesn't mention all of the various timing signals, and it also ignores common performance enhancements such as multiple-banked modules, burst mode, etc. A write process is performed similarly, except of course that the data is read into the chips instead of being sent out by them. A special signal called "R/W" (actually written with a horizontal line over the "W") controls whether a read or write is being performed during the access.
The amount of time that it takes for the memory to produce the data required, from the start of the access until when the valid data is available for use, is called the memory's access time, sometimes abbreviated tAC. It is normally measured in nanoseconds (ns). Today's memory normally has access time ranging from 5 to 70 nanoseconds. This is the speed of the DRAM memory itself, which is not necessarily the same as the true speed of the overall memory system. Note that much of the difference in access times of various DRAM technologies has to do with how the memory chips are arranged and controlled, not anything different in the core DRAM chips themselves.
Asynchronous and Synchronous DRAM - Conventional DRAM, of the type that has been used in PCs since the original IBM PC days, is said to be asynchronous. This refers to the fact that the memory is not synchronized to the system clock. A memory access is begun, and a certain period of time later the memory value appears on the bus. The signals are not coordinated with the system clock at all, as described in the section discussing memory access. Asynchronous memory works fine in lower-speed memory bus systems but is not nearly as suitable for use in high-speed (>66 MHz) memory systems.
A newer type of DRAM, called "synchronous DRAM" or "SDRAM", is synchronized to the system clock; all signals are tied to the clock so timing is much tighter and better controlled. This type of memory is much faster than asynchronous DRAM and can be used to improve the performance of the system. It is more suitable to the higher-speed memory systems of the newest PCs.
Note that there are several different flavors of both asynchronous DRAM and synchronous DRAM; they are discussed on the page covering DRAM technologies.
DRAM Speed Ratings
There are two different ways that DRAM chips are rated for speed. Conventional asynchronous DRAM chips have a rated speed in nanoseconds (ns, or a billionth of a second), a speed which represents the minimum access time for doing a read or write to memory. This includes the entire access cycle. Most asynchronous memory in modern systems is 50, 60 or 70 ns in speed. Older systems (386 and earlier) use usually 70 or 80 ns RAM. Very old systems use even slower memory: 100, 120 or even 150 ns. Systems running with a clock speed of 60 MHz or higher generally require 60 ns or faster memory to function at peak efficiency. 70 ns is fine for 486 or older PCs.
Synchronous memory is much faster than conventional asynchronous RAM. It is usually rated at 12, 10 or even 7 nanoseconds; however you have to be careful here. An SDRAM module rated at 10 ns is not "5 times faster" than an EDO module rated at 50 ns. Since SDRAM is synchronized to the internal system clock, SDRAM speed ratings refer to the maximum speed at which the SDRAM module can burst data onto the bus. This does not include the addressing latency time the way asynchronous DRAM speed ratings do, which is why the numbers are much smaller. The core DRAMs inside the SDRAM module are usually not any faster than those of older technologies; the increase in usable speed is due to how the module is constructed and controlled. See the following section on SDRAM for more details.
DRAM chips are usually marked with their speed via a suffix at the end of the part number. If you look at the chips themselves, you'll see something like "-6" or "-60". This usually means 60 nanosecond DRAM. The suffix found on SDRAM chips is often "-12", "-10" or "-07". Note that older memory running at 100 or 120 ns also used "-10" and "-12" sometimes. This memory hasn't been used in years so there really shouldn't be any confusion between the two types. However, 70 ns memory uses "-7" and this can be readily confused with 7 ns SDRAM memory if you are not careful.
In addition to being referred to using a nanosecond speed rating, SDRAMs are also often rated in terms of their maximum frequency, in MHz. This is really the same thing, just expressed in a different way: for example, an SDRAM module with a 10ns rating would be called instead a "100 MHz SDRAM". 100 MHz is 100 million cycles per second, which is the reciprocal of 10ns, one-hundred-millionth of a second per cycle. This MHz number is not the same as saying that the SDRAM with that rating is designed for a system of that speed. A 100 MHz SDRAM may not function in a 100 MHz system bus PC. See here for more.
The rated speed of the memory is a maximum. In theory, the memory cannot support memory timing that requires a faster speed of RAM. However, in practice many companies rate their DRAM conservatively, so that the memory will function at a higher speed than what is indicated. This is why many Pentium systems running on a 66 MHz bus will work with 70 ns memory, even when set to 60 ns timing. However, this is not reliable and cannot be counted on (in a way, it is a form of overclocking) and is not recommended. You can usually compensate for slower memory by turning down the system timing level, which will cause a small performance decrease but give you better reliability.
SDRAM speed ratings and selection criteria are more complicated than those for conventional asynchronous RAM. Refer to the section on SDRAM.
Mixing DRAM Speeds - Mixing memory speeds refers to the use of DRAM of more than one speed in the same computer. For example, you might have bought a machine in 1994 that came with 70 ns DRAM (the fastest speed generally available then) and later upgraded with more memory in 1997 that was 60 ns. While it's generally preferable to avoid doing this, it can work without problems as long as certain caveats are followed:
Use Identical Memory Within a Bank: PCs read a certain bit width of memory at a time, typically 32 or 64, and the memory making up this width is called a bank. PCs always read data from more than one chip at a time within a single bank of memory. If different memory is used within a bank, some of the bits may arrive later than others and all sorts of system problems can result. For this reason you should only use the same type and speed of memory within a bank. This also means using the same technology--never mix EDO and FPM memory (for example) within a bank.
Put The Slowest Memory in the First Bank: Some memory systems automatically detect the speed of the memory being used, and set the system timing accordingly. They usually only look at the speed of the memory in the first bank when setting the timing. If you have 60 ns RAM in the first bank and 70 ns in the second bank, the system may set the timing at a rate that works fine for the 60 ns memory, but causes problems for the 70 ns. You should put the 70 ns memory in the first bank instead. (If your system doesn't do autodetection this won't be an issue but it is still good practice). Note that the first bank of memory is often called "Bank 0".
Some systems just generally have a hard time working with dissimilar banks of memory. I once tried to upgrade a system that had a pair of 8 MB, fast page mode 60 ns SIMMs, with another pair of 8 MB, fast page mode 60 ns SIMMs of another brand. The two pairs just would not work together in any configuration, even though they worked fine separately. See this section of the Troubleshooting Expert for more on RAM problems.
Memory Bus Speed and Required DRAM Speed - Most modern systems generally require the DRAMs they use to be a certain minimum speed. The speed required is normally a function of the speed of the memory bus. Faster memory buses require faster speed DRAMs and in some cases, faster technologies. While it is not always cut-and-dried what speed is necessary, the table below is a guideline. It is usually possible to use slower memory in any system if you slow down the memory timing, but of course we're trying to make our systems run as fast as we can.